1. Field of the Invention
A filter is a signal processing device which is capable of discriminating in favor of or against certain classes of signals, generally as a function of frequency. The digital filter operates upon a digitized signal, performing calculations upon the signal and outputting the result as a modified or filtered version of the input.
2. Description of the Prior Art
There are essentially three classifications of filters. The first two classifications are filters which deal with analog signals, that is, signals which are continuous in time. The third class of filters deals with digital signals, that is, signals which have discrete values for a certain element of time. The first class of filter is the passive filter composed of inductors, capacitors, and resistors. The second class of filter is active filter composed of resistors, capacitors, and amplifiers. Both of these are well known and understood. The third class of filter is the digital filter. The theory of digital filters is known but until recently the expense of constructing these filters has been prohibitive. Recent advances in MOS/LSI technology now makes digital filters economically feasible in certain applications.
There are various means of implementing digital filters, the problem being dominated by trade-offs in flexibility, economy, physical size and complication of various design schemes, and internal logic problems. Various approaches are shown in the literature, "Approach to the Implementation of Digital Filters", Jackson Kaiser, McDonald, IEEE trans. audio electroacust., volume AU-16, pp 413-421, Sept. 1968; "Designers Guide to: Digital Filters", Leon and Bass, Electronic Design News, Jan. 20, 1974.
Contemporaneous prior art for digital filters typically uses a building block approach. Each multiplication is accomplished by an individual multiplier chip, thus requiring several such chips. Delays are achieved by individual delay chips. Input/output is handled by 1 chip. Timing pulses are generated on individual packages, one for each phase. Power buffer is on 1 chip. An ROM is necessary for the desired coefficients.
Typically, for a recursive second-order serial digital filter the following packages or chips are necessary:
2 shift register delay chips PA1 4 multiplier chips PA1 1 input/output chip PA1 1 power buffer chip PA1 1 ROM chip
This is a total of 9 packages which must be operatively connected to form the desired filter. Usually after the "building block" approach has been tested and evaluated, the special filter developed is produced on custom MOS chips. This method leaves little or no flexibility in the filter developed and requires a substantial amount of interconnection between the numerous chips.
Thus, a need exists for a digital filter construction of a minimum number of MOS/LSI chips to minimize expense of development and production, which has the flexibility to vary filter characteristics without an entire alteration of the filter, and which can be adapted to a wide range of uses.